Stored Program Concept

4.7.2 (17 questions). Public Notes: AQA's A Level Computer Science

What is a system bus.

A set of parallel wires which transfer data and signal components between internal CPU components.

State the purpose of the control bus

Send control signals.

State the purpose of the data bus.

Transmit data between each component of the CPU. It is bidirectional connection to all components.

State the purpose of the address bus.

Transmit memory addresses from the processor to every other CPU components. It is unidirectional connection from the CPU to each CPU component.

State five control signals sent on the control bus

  1. Memory Read - Data from the addressed location placed on the data bus.
  2. Memory Write - Data from the data bus to be written into addressed location.
  3. Bus request - A device is asking for permission to use the data bus.
  4. Bus grant - A signal giving permission for access of the data bus.
  5. Clock Signal - Synchronise operations of the CPU components.

Define word length.

The smallest addressable unit of memory.

Explain what determines the word length of a CPU.

The width of the data bus, number of wires used for parallel transmission.

Explain how increasing the width of the address bus affects the performance of the CPU.

Increasing the width of the data bus will increase the word length. This increases the range of memory addresses which it can specify, which increases the amount of addressable memory. More addressable main memory, the greater the performance

Explain how increasing the width of the data bus affects the performance of the CPU.

Increases the volume of data which can transferred over the bus at any one time. Faster data transfer speeds, greater performance.

State the purpose of main memory.

Stores program code and the data they are using, which are to be processed.

An address bus has a width of 16 bits, what is the maximum amount of addressable memory.

2^16 / 8 64KB

State the 2 tasks of an I/O controller.

Part of the CPU which converts signals received from a peripheral device to a format the computer can understand. It receives requests from the CPU and sends device specific control signals to peripheral devices.

State the purpose of an I/O controller.

Manages data flow to and from device in order to free up processor time.

Describe the Harvard architecture, and explain why it is more suitable the von Neuman architecture for an oscilloscope.

Oscilloscope → Digital Signal Processing (DSP).

  1. Data and instructions are store in separate physical memory locations and transferred to the processor on their own buses.
  2. Separate memory pools for data and program instructions means instructions and data are no longer competing or waiting to use the same buses.
  3. A greater volume of information can be transferred to and worked on by the processor at any one time.

Describe the von Neumann architecture.

Instructions and data are stored in the same physical memory pools and share the same data buses.

What innovation has allowed for general purpose computers.

The stored program concept has allowed for a computer to have unfixed programming and perform many different tasks at different times.

Explain what is meant by the stored program concept.

Data and instructions are stored in main memory. Instructions are fetched one at a time by the processor and executed immediately in sequential order.