State the purpose of the Arithmetic Logic Unit (ALU).
Perform arithmetic, logical and shift operations on data within registers.
State the purpose of the Control Unit (CU).
Decodes instructionsSends control signals to fetch addresses and data itself Sends signals from the clock to all other CPU components to synchronise operations.
State the purpose of a System Clock.
Produces a square wave, with a regular frequency, alternating between ON-OFF, to synchronise communication between CPU components and rest of the computer.
Describe how the System Clock synchronises operations.
Operations are carried out only on the rising edge. Each operation takes a fixed number of clock periods.
Define registers.
Small volatile storage locations within the CPU with very high read, write and access speedsUsed to hold data temporarily which is being worked on.
Compare special purpose registers and general purpose registers.
General purpose registers store any data which is to be or has been manipulated by a instructionSpecial purpose registers hold specific types of information.
State the purpose of the Program Counter (PC).
Holds the memory address of the next instruction to be executed.
State the purpose of the Current Instruction Register (CIR).
Holds the current instruction.
State the purpose of the Memory Address Register (MAR).
Holds the memory address where the processor is required to fetch data from or store data to.
State the purpose of the Memory Buffer Register (MBR).
Holds the contents of a memory location which has been read from, or the data which is stored in a memory location.
State the purpose of the status register (SR).
Contains flag bits which change to indicate an interrupt, overflow or underflow error.
Explain the term processor instruction set.
All the instructions which a processor can understand and executeIs specific to a family of processors: x86, ARM, RISC-V.
State the three parts of a machine code instructions.
Opcode + addressing mode bit + Operand.
Explain the difference between immediate addressing mode and direct addressing mode.
- With immediate addressing mode: the value specified by the operand is the actual value to be used.
- With direct addressing mode: the value specified by the operand is the memory address where the actual value is stored.
State 4 factors which affect the performance of a CPU.
- Clock speed.
- Cache memory.
- Core count.
- Word length.
Define processor interrupt.
A signal sent to change the Status Register (SR) of the CPU, After each FDE cycle the SR is checked, noticed and handled using a vectored interrupt method. Then a interrupt service routine is called before normal execution is resumed.
State the two origins of processor interrupts.
- Hardware
- Software
E.g. When an I/O operation is complete or throws an error ( Printer out of paper)
E.g When an application program terminates or requests services from the OS.
Explain what vectored interrupt method is.
- Current executing instruction stops.
- The contents of all the registers within the CPU is pushed onto the system stack as a volatile environment.
- Once the interrupt service routine finished, the volatile environment is restored and resumes normal execution.
Explain what an interrupt service routine is.
A series of instructions for handling an interrupt, specific to that type of interrupt.
State the three stages of the Fetch-Decode-Execute (FDE) cycle.
You will not get marks if you use abbreviations as I have used here! Please use full register names.
- Fetch.
- PC → MAR instruction.
- PC + 1.
- MAR → Main Memory instruction via address bus.
- Main Memory → MBR data/instruction via data bus.
- MBR → CIR.
- Decode.
- CIR decodes instruction and sends it to PC.
- CIR also fetches additional data, if required by placing an address in MAR.
- Execute.
- Instruction is executed by ALU registers store intermediate data and results.
- The result is stored in the accumulator.